As is known, the advent of large-scale integration in the fabrication of MOS devices, in particular, below the level of one micron (ULSI—Ultra-Large Scale Integration), calls for a drastic reduction in the vertical and lateral dimensions of the body, source, and drain regions (the latter in the case of lateral-conduction MOS devices), so as to obtain shallow junctions or ultra-shallow junctions. These size reductions could in theory be achieved by reducing the thermal budget associated with the MOS device, but this solution is not efficient for activation of the heavily doped shallow regions that constitute the source and drain regions of the device (in what follows defined as source/drain regions in the case of a lateral-conduction device, and as source regions in the case of a vertical-conduction device).
In N-channel devices, implants are usually made with low-diffusivity dopants, such as arsenic (As), followed by a rapid thermal annealing (RTA) treatment for dopant activation. The RTA treatment enables, as compared to a traditional thermal treatment, reduction of the thermal budget of the process; however, it is not efficient in the case of high-dose implants. In particular, RTA treatment does not enable an efficient removal of the crystallographic defects due to ion implantation, which are responsible for degradation of the electrical performance of the body/drain junctions and/or of the gate oxide. In P-channel devices, the high diffusivity of the dopant boron (B) atoms, normally used for the implantation process, does not enable the formation of shallow junctions. At the same time, alternative low-diffusivity dopants, such as for example indium (In), are difficult to use for source/drain implants, due to the poor properties of electrical activation.
Conventional thermal treatments, even if rapid-annealing methods are used, do not, in any case, enable an accurate control of the dopant diffusion and are consequently not indicated for the formation of ultra-shallow doped regions, where the repeatability of the process is fundamental for precisely controlling characteristics such as threshold voltage and channel length.
In the last few years, the use of alternative techniques has consequently been proposed, in particular, excimer-laser irradiation techniques for local heating and possibly melting of silicon regions to enable rapid diffusion and activation of dopant atoms. Excimer-laser-annealing (ELA) technology enables extremely shallow doped regions (with a depth smaller than 0.1 μm) to be obtained, with excellent electrical characteristics, in particular, with an extremely small sheet resistance. FIG. 1 shows in this regard a graph illustrating the pattern of the sheet resistance Rs as the junction depth varies, in the case of traditional RTA technology (dashed line) and ELA technology (solid line), in which the boxes indicate the technological integration nodes.
In detail, excimer-laser irradiation enables melting of silicon regions having dimensions that can be controlled with extreme precision by adjusting the irradiation energy. During melting, the crystallographic defects due to ion implantation are completely eliminated, and dopants diffuse rapidly within the molten region. During a subsequent liquid-phase epitaxial process, the dopant is then incorporated in the regrowth region. Thanks to the effective thermal dissipation towards underlying silicon regions, the temperature remains sufficiently high for a solid-phase diffusion only for tens of nanoseconds, a time that is not sufficient for the occurrence of a significant transportation of dopant atoms beyond the molten region.
Even though the use of this technology in the MOS-device manufacturing process is particularly advantageous, it involves, however, considerable problems. In fact, high laser-annealing irradiation energies are required to completely melt the doped source/drain regions where a large number of implant-generated crystallographic defects are present. Consequently, there exists the risk that irradiation will cause melting and deformation of the structures that make up the MOS device. In particular, the body and source/drain implants are performed in a step subsequent to formation of gate structures (which include, in a known way, at least one region of silicon oxide surmounted by a gate electrode, normally of polycrystalline silicon), self-aligned to the gate structures or to spacers formed laterally to the gate structures.
The ELA process causes melting and deformation, in particular, of the gate electrodes, jeopardizing the electrical characteristics of the MOS device. It is consequently necessary to reach a compromise in the determination of the irradiation energy, taking into account the maximum energy that the MOS structure is able to withstand without any deformations occurring. The problem of the high energy required is moreover aggravated by the geometrical structure of the region to be irradiated. In this regard see FIG. 2, which is a schematic perspective cross-sectional view of a typical geometrical structure of a MOS device 1 of a known type. The MOS device 1 comprises: a substrate 2 having a top surface 2a; gate structures 3 (illustrated in an extremely simplified way), formed on the top surface 2a of the substrate 2, which succeed one another in a first direction x and extend, parallel to one another, in a second direction y substantially perpendicular to the first direction x; and source/drain regions (not illustrated) constituted by doped regions formed in surface portions of the substrate 2 adjacent to, and partially underlying, the gate structures 3. The source/drain regions are formed within source/drain windows 5, defined by contiguous gate structures 3 arranged in the first direction x. The source/drain windows 5 have the shape of narrow channels, for example with a width l of 600 nm and a height h of 700 nm.
The laser irradiation for annealing of the source/drain regions and activation of the respective dopants occurs in a direction normal to the top surface 2a of the substrate 2, within the source/drain windows 5. On account of the wavelike nature of the laser radiation and of the reduced dimensions of the regions to be irradiated, phenomena of optical interference with the side walls of the gate structures 3 occur, with the result that peripheral portions of the source/drain regions in the proximity of said walls receive a lower intensity of irradiation than do the central portions. The thermal difference caused by this phenomena of interference is moreover accentuated by phenomena of thermal dissipation from the aforesaid peripheral portions towards adjacent cold regions of the substrate 2, situated underneath the gate structures 3. The result is a non-uniform heating of the source/drain regions, with the temperature T varying according to the pattern illustrated in the detail of FIG. 2 within the source/drain windows 5, with a maximum at the central portions of the source/drain regions, and a minimum at the peripheral portions thereof. In order to obtain a sufficient annealing of the peripheral portions of the source/drain regions, with a complete removal of the crystallographic defects, it is consequently necessary to use a high energy density of irradiation, even higher than 1 J/cm2, which causes, however, deformations of the MOS-device structure.
By way of example, FIGS. 3a and 3b show photographs taken with a transmission electron microscope (TEM) of a section of a portion of the MOS device 1. In detail, FIG. 3a corresponds to an irradiation at an energy such as not to remove completely the defects (which are in fact highlighted in the areas circled in black in FIG. 3a). In this case, minimal deformations appear in the MOS device. Instead, FIG. 3b corresponds to the use of a high irradiation energy, which indeed leads to complete elimination of the implantation defects, but also to a corresponding evident deformation of the gate structures (in particular, a lateral leakage of the gate electrode polysilicon occurs).
In an attempt to overcome the problems described above, it has been proposed, for example in U.S. Pat. No. 5,401,666, which is incorporated herein by reference, to exploit the modulation effect in the radiation transmission by layers of silicon oxide with different thicknesses. In particular, it has been proposed to coat the gate structures at the top, prior to carrying out laser irradiation, with a silicon-oxide layer having a thickness such as to have a maximum reflectivity to the laser radiation at the frequency used, in order to reduce the intensity of the laser radiation absorbed by the underlying gate electrode, and consequently limit its deformation; in addition, it has been proposed to coat the source/drain regions, where it is intended to activate the dopant, with a silicon-oxide layer of a thickness such as to have minimum reflectivity to the laser beam, and thus maximize the intensity of the laser radiation absorbed by the underlying regions. However, at the high levels of energy involved, also this solution is not sufficient to prevent deformation of the gate structures. Therefore, in the manufacturing processes of MOS transistor devices using ELA techniques, currently two distinct steps are envisaged for the implantation and activation of dopants in the source/drain regions.
In detail (FIG. 4a), after the formation of the gate structures 3 (illustrated schematically) on the substrate 2, a low-dose ion implantation is performed within the source/drain windows 5 to produce lightly doped source/drain regions 6, which are then activated via a thermal process of a traditional type, for example an RTA process. In a subsequent step (FIG. 4b), a layer of dielectric material, for example silicon oxide, is deposited, and subsequently etched in an anisotropic way (for example, by means of plasma etching), for the formation of spacers 7 at the sides of the gate structures 3 and of protection regions 8 on the gate structures 3. Then, a second ion implantation, at a high dose, is performed within the source/drain windows 5 in a way self-aligned to the spacers 7 to produce heavily doped source/drain regions 9. Next, the heavily doped source/drain regions 9 are subjected to an ELA process (indicated by the arrows) for activation and diffusion of the dopants. At the end of this process, the source/drain regions of the MOS transistor device comprise two distinct regions with different levels of doping and different vertical diffusion and having a different sheet resistance, namely: the lightly doped source regions 6, situated partially underneath the gate structures 3, which form, together with the body regions (not illustrated), the channel of the MOS transistor device; and the heavily doped source/drain regions 9, adjacent to the lightly doped source/drain regions 6, which act as low-resistivity connections with corresponding contact metallizations (not illustrated).
With the process described, the regions with a higher concentration of dopant (and hence with a greater concentration of defects) are confined, by means of the spacers, far from the channel region or from the gate region of the MOS device, and so do not limit the quality and the characteristics of the device (in fact, in a known way, said defects are harmful if located in an area corresponding to the gate or channel regions). The energy of the ELA irradiation can thus be the minimum necessary for melting the silicon and activating the dopants, without excessive concern for annealing of the crystallographic defects.
The manufacturing process described previously can be used for lateral-diffusion MOS devices, but is not, however, optimized for vertical-diffusion MOS devices (VDMOS), such as power MOS transistors or IGBTs. In this case, the presence of a single high-doping source region is advantageous for optimization of the on-resistance and of the forward transconductance of the devices. With the process described, two source regions are obtained, one of which (in an area corresponding to the channel region) has a higher sheet resistance. Furthermore, in the VDMOS, the threshold voltage is heavily dependent upon the lateral diffusion of the source regions so that it is necessary to carry out an accurate control of said diffusion in order to obtain a good repeatability of the threshold voltage value (which is something that does not occur with the process described, in which the lateral diffusion is controlled, with low precision, by means of a conventional thermal process). It would then be advantageous to use a process of laser irradiation, controllable in an accurate way, to produce a single heavily doped source region having a low sheet resistance and without any residual crystallographic defects.